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Altera_Forum
Honored Contributor I
822 Views

MAX10 FPGA on-chip input termination for LVDS 100R

Hello, 

I am making pcb for ALtera MAx10 project, where i use 5 Rx/Tx LVDS lanes connected to SATA connectors. 

 

Since it is LVDS, it needs termination on receiver. Now i know that Cyclone series had LVDS on-chip 100R termination, so my SATA connector could be configured as Master, and as Slave from Quartus software with no soldering required. 

 

but i was unable to find any data regarding max10 on-chip termination, does that mean, it does not have it ? and if it does have it, how can i enable it ?
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Altera_Forum
Honored Contributor I
40 Views

 

--- Quote Start ---  

I know that Cyclone series had LVDS on-chip 100R termination 

--- Quote End ---  

 

Cyclone V has, Cyclone III/IV hasn't. MAX10 is effectively Cyclone III/IV core, it neither has differential on-chip termination.
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