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What is the maximum forward voltage of build in clamping diode (PCI IO) in MAX10 FPGA devices?
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Hello,
Please refer from page 17 of Max 10 GPIO document: https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/max-10/archives/ug_m10_gpio-18-1.pdf
Thank you
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Thanks for your reply. I've read the
- "Intel® MAX® 10 General Purpose I/O User Guide ",
- "MAX10 Datasheet",
- "AN 447: Interfacing Intel® FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems" ,
- "Intel® MAX® 10 FPGA Signal Integrity Design Guidelines"
documents, but none of them answers my question about max. forward voltage of internal clamping diode.
Is there any alternative way to determine the requested value (spice, IBIS model)?
Thanks in advance.
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Hello,
Is the information that you need at page 21 from the document I shared earlier?
Thank you.
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Unfortunately not. Just looking for Vf_max in mV.
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Hello,
We do not have specific value for that. The forward voltage is relative to the VCCIO. We publish the max current that can flow. User has to ensure the current with regard to the voltage they apply.
Thank you.
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We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

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