Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Max 10: Lvds

Altera_Forum
Honored Contributor II
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I do like to have such a functionality in my design that could detect presence of data on LVDS lines and assert a flag. And in case no data is being received it can deassert the flag. I am using MAX-10 device to implement this design. Does the differential line go into high impedance state if no data is available? or if someone can guide what else can be done to implement this functionality.

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Altera_Forum
Honored Contributor II
110 Views

A reliable check for "presence of data" requires a property of the data stream like a CRC or checksum. "Out of band" signaling" e.g. based on the common mode level isn't provided by the LVDS standard. You could implement it in additional hardware, but I won't consider it as reliable method.

Altera_Forum
Honored Contributor II
110 Views

Does it mean that there always would be some voltage at the differential lines? resulting in logic 1 or 0 at receiver?  

 

Also please correct me if I am wrong but I thought CRC and checksum are for error detection in bit stream. I am more interested to know when the first bit arrives via LVDS, so to be able to latch it accordingly.
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