In the Pin Connection Guidelines, regarding VREFB it states to "connect unused pins as defined in the Intel Quartus Prime software. I ran fitter and looked at the .pin file to see how the software assigned the VREF banks. It set all IO banks VREF to 3.3V except IO bank 1b which it set to 2.5V. The problem is I am using the single supply model and only have access to 3.3V (Max 10 10M04SCE144A7G). Should I just manually set it to 3.3V? Looking for some clarification. Thanks!
- Intel® MAX® 10 FPGAs
Having supply of 3.3V doesnt mean that our I/O standard has to be 3.3V. FPGA IO is flexible enough which you can have different I/O standard for different I/O bank. In this case, i would suggest to change it to 3.3V I/O standard in pin planner or pin assignment.