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Max 10 clock divider

Altera_Forum
Honored Contributor II
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I am using the internal oscillator in the max10, and wondering whats the best way to divide it down. I looked into using a PLL for this but that doesn't seem to be possible. Is there any better approach than the old standard counter divider?

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Altera_Forum
Honored Contributor II
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hi, i have the same problem to some extend. I used the internal oscillator on max 10. It's datasheet says that it can be use in range of approximately 55-166 MHz, I set it for 166 but the practical frequency that i get from clk-out was 83.4!!! it's close to the average of the datasheet claim! what's the problem? and at what frequency does this internal oscillator work???

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Altera_Forum
Honored Contributor II
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Actually the datasheet indicates the internal oscillator range for the smaller MAX 10 devices is from 55MHz to 116MHz (not 166MHz). 

 

So if you try to set it to 166MHz the result will be undefined; keep the value in the range of 55..116 and you should find that works. 

 

Ref: https://www.altera.com/en_us/pdfs/literature/hb/max-10/m10_datasheet.pdf page 28.
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Altera_Forum
Honored Contributor II
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You could just build a simple counter which counts one bit up on each cycle and when your counter reaches a specific value another counter (clock) counts one up or down.

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Altera_Forum
Honored Contributor II
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That was my misprint dude. Actually my question was something else.I just can set the clk frequency for 55Mhz or 116Mhz but not any other frequency in the range of 55Mhz or 116Mhz. I can't use PLL for that, because the it has forbidden by the datasheet. the first question is how i can reach the frequencies in the range of the 55-116Mhz. and the second question is the practical frequency that i get from the output clk is 83.4 in the cases that i set the working frequncy of the core for 55Mhz or 116Mhz! why it's acting like this??

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Altera_Forum
Honored Contributor II
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Hi, 

 

I went through the same thing. I think you are misreading the datasheet, like I did at first. The datasheet is simply saying that the internal oscillator is guaranteed to be *somewhere in the range* of 55-116MHz. There is no way to set it- you get what frequency you get from the factory, somewhere in that range. In my experience, it is usually right in the middle of that range, which is what I think you are seeing, too. I know the IP says something about setting the frequency, but it's misleading. You can't. 

 

So your design must be really tolerant of different clock speeds! :) 

 

If you want to slow it down at all, I would use a counter, and grab whatever bit output you need to get the frequency desired. Remember that even then, it's frequency will be proportional to the variation of the internal oscillator. 

 

One bright spot is that (as far as I know, I could be wrong!) the internal oscillator frequency will stay at whatever frequency it comes at. I don't think it will drift over time. 

 

HTH 

Robert
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