HiI have a design, using DDR2 and ALTMEMPHY on the Cyclone-III. My DDR2 IOs are on the side of FPGA (Row IO). According to the 2008 release of AN-445, maximum clock rate of the ALTMEMPHY is 167 MHz for side IOs, 150 for Wraparound IOs, and 200 for top/bottom IOs. AN-445 of 2009 has increased max. clock rate to 167 for wraparound IOs. There is no newer release of this AN. On the other hand, on the Cyclone-III latest handbooks or datasheets there is no information on the maximum clock rate of ALTMEMPHY. I need 200 MHz clock rate for my DDR2 interface which is on the row IO, but I cannot be sure its timing is met on the memory side (due to the ambiguity of the datasheet). What is the maximum clock rate of DDR2 ALTMEMPHY on Cyclone-III devices? Thanks
I have already tested a 200 MHz ALTMEMPHY DDR2 on the row IO (on the side of FPGA) and it worked, but I must be sure that it will work on the other boards in the mass production line. Any comments?
msj -Check out this external memory interface spec estimator: https://www.altera.com/products/intellectual-property/best-in-class-ip/external-memory/support-selec... According to this the limit for Cyclone III is 167MHz for row I/O in C6 speed grade, 150MHz for C7, and 133MHz for C8.