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Hi,
I am connecting counter 4-bit to ALTIO_BUFF [output differential]. Therefore 4 pin input and 4-pins output. But after synthesis, i am getting differential pins are all positive i.e. 8 pins am getting in pin planner. Please clarify the connection between the counter and single-ended input and differential output buff. Please find the attachment. and point out design error please. Anything wrong in my designLink Copied
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Hi,
If you are configuring ALTIO_BUFF in differential mode & Using Stratix II, Cyclone II, Arria GX, and previous device families then you need to give that pin an I/O standard assignment with a value of "LVDS" or the differential I/O standard that you wish to use & other than these devices family, you need to port both the positive and negative signals to I/O pins. Please check the following links for more details, https://www.altera.com/support/support-resources/knowledge-base/solutions/rd01062009_916.html For Assigning Differential Pins, https://www.altera.com/en_us/pdfs/literature/hb/qts/qts-qpp-handbook.pdf Refer Thread, https://www.alteraforum.com/forum/showthread.php?t=35773 Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards Vikas Jathar Intel Customer Support – Engineering (Under Contract to Intel)
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