Memory usage for the RAM port 2

[Altera_Forum]

Hi, 

 I had a common question regarding the Megawizard ram port 2 memory usage. The device use was stratix II. When i create the Megawizard, i choose two read/write ports on the first page.    On the second page i choose 18 for read and write ports and 1024 for words of memory. and memory type block M9k.   The results in the memory usage shows 2 M9K which is correct as    18 x 1024 / 9216 = 2   how ever when i chooise for 2056 words it shows 5 M9k.   18 x 2056 / 9216 = 4   by comparing above, it shows a different memory usage. Do any one know what is the reason?   Any help would be very much appreciated. thanks best regards kenny

[Altera_Forum]

The stratix 2 doesnt use M9ks. It has MRAMs, M4Ks and M512s

[Altera_Forum]

Sorry, it should be stratix III

[Altera_Forum]

(18 * 2 056) / 9 216 = 4.015625 

 try 2048 instead.

[Altera_Forum]

It is typo error, 2048 is the real value. If you try to used the megafunction, you will saw the resouce usage on that... 

 thanks

[Altera_Forum]

ah right. 

 to get a depth of 2048, the RAM is configured into 2048 x 4 mode. to make the bus x18, five x4 RAMs have to be used (2048 x 2 bits are unused). if four 512 x 18 blocks were used, external logic would have to be used to MUX between the 4 sets of x18 outputs.

[Altera_Forum]

Hi thepancake, 

 can you elaborate more? why does RAM would be configure into 2048 x 4 mode?    why (using x18, five x4 RAM) 2048 x 2 bits where unused?   Thanks in advance,

[Altera_Forum]

Hi thepancake, 

 I figure out RAM to be configured into 2048 x 4 mode is actually the port width configuration. And with one ram there are x4 width of the data bus. thus to make x18 we will need five x4 RAMs to be used.    thanks correct me if i were wrong, best regards kenny

[Altera_Forum]

that's right, the RAM width necessitates 5 blocks used instead of 4.