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Hi All.
I am designing a new project that will include selecting one of Twenty 125Mhz square wave clock signals, and measuring the frequency of the selected one. My plan is to insert all of the clocks into a cyclon III FPGA through the LVDS inputs, select one of them using the internal combinatorial logic, and distribute the selected clock on a global clock network. The selected clock will then be used to sample an accurate 1 second period pulse, so the 125Mhz frequency will be measured. My concern is whether the cyclon III internal logic can handle 125Mhz signal. Does anyone have any experience on the matter ? Thanks in advanceLink Copied
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See Table 1-19 on page 1-14 in the cyclone iii device datasheet (http://www.altera.com/literature/hb/cyc3/cyc3_ciii52001.pdf). You should be fine at 125MHz.
Regards, Alex
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