My DDR2 clock lines are too long - ok?

[Altera_Forum]

After having laid out my DDR2 PCB traces I discovered that my CK0/CK1 traces are 4.9% too long compared to Altera's recommendation. My DDR2 clock runs at 267 MHz (3,745ps period) and, due to the too long traces, the clock arrives 185 ps too late.  

 Since my PCB will not allow me to shorten the clock traces, I wonder whether this would work okay? I have no space to make the address and control lines longer, either...  I have seen recommendations that the clock traces should be made longer than the address and command such that the setup time is improved. In my case, i suppose there will be a possible setup time violation (i'm using a 2 GB Micron SO-DIMM with the mt47h128m8 (http://download.micron.com/pdf/datasheets/dram/ddr2/1gbddr2.pdf) base device).  It looks like the DDR2 Controller's (Arria II GX) board trace model can be setup to adjust for the longer clock traces. Any comments on whether this is possible? I will study further but it would be nice to get a go/no-go early opinion...  http://www.altera.com/literature/hb/external-memory/emi_tut.pdf (http://www.altera.com/literature/hb/external-memory/emi_tut.pdf) Thanks.

[Altera_Forum]

I'd say this is too small length difference to introduce any problems... Probably signal noise will cover that difference.

[Altera_Forum]

Okay. I typed in my actual board trace parameters in the HPCII Megawizard screen and the TimeQuest report stated that I have a good slack of some 1.5ns on both setup and hold. This should then be a non-issue and my layout should be fine. 

 Thanks.