NIOS Custom instruction compilation problem

[Altera_Forum]

Hi everybody, 

 I'm trying to add a custom instruction to a NIOS processor, through the SOPC Builder tool, with tools version 8.1.  When I try to generate the system (button "generate" in SOPC Builder), I get the error :  Error (10867): Verilog HDL or VHDL XML Interface Error ... : port "nY1" has an unsupported type  The mentioned code line is :  entity fp_exp_exp_y1 is  generic ( wF : positive := 23 );  port ( nY1 : in std_logic_vector(fp_exp_wy1(wF)-1 downto 0);  nExpY1 : out std_logic_vector(wF+fp_exp_g(wF)-1 downto 0) ); end entity;  This entity is part of the custom instruction, and uses the VHDL function 'fp_exp_wy1', which seems to be the problem. The same error is reported for output port nExpY1, unless I remove the use of the 'fp_exp_g' function.  If I try to compile the VHDL block of the custom instruction in a separate Quartus Project, it compiles and synthesize without problem. If I remove the function call (using only constants in my input signal definition), it works fine. I think the code used to work fine with a previous version of Quartus, but downgrading the tools isn't convenient. And in a general way, the SOPC tool complains about problems when importing VHDL modules, while they compile with no error in Quartus.  Is there a way to make SOPC Builder accept my VHDL code ?  Thanks.

[Altera_Forum]

Answering to myself; this might help someone ... 

 I took the description files of my custom instructions as generated by the 6.0 version of SOPC Builder.  They consist in folders named user_logic_xxxxx containing a class.ptf file describing the instruction module. In newer versions of SOPC (like 8.1), custom instruction modules are described by .tcl files.  Importing the old-fashioned description files in a 8.1 Quartus project worked fine and the project compiled. Instead of converting ptf files to tcl files as I would expect, SOPC Builder kept the ptf files and named my instructions "cpu_user_logic_xxxxxx_classic".  No problem occured about the vhdl functions which were the issue with .tcl files. So I guess I'll stick with the "classic" version of importing user modules :-)

[Altera_Forum]

Going on investigating, I found that Quartus 9.0b still has the problem. 

 I opened a sample project from the NIOS project samples, and imported my custom instruction. In the import wizard, HDL syntax errors were reported but the wizard went on and allowed me to import the custom instruction, generate the system and compile in Quartus.  I then closed the Quartus software and immediately reopened the project and the SOPC tool. It was then impossible to regenerate the system.  It seems that the Sopc import wizard keeps track of the libraries required by my module when importing it (the vhdl function causing error messages is defined in a vhd library which is defined in the same vhdl file than my module), but fails to store this information for future use. The generated .tcl file contains the list of vhdl libraries used by the module (1), but it doesn't seem enough.   (1) set_module_property LIBRARIES {ieee.std_logic_1164.all ieee.std_logic_arith.all ieee.std_logic_unsigned.all mylib.all}