Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.

Nios IED error

Altera_Forum
Honored Contributor II
1,129 Views

In IDE,when I run my project as hardware, an error occours: 

 

There are no Nios II CPUs with debug modules available which match the valuesspecified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary.
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
410 Views

Which device are you using?  

Check if, in the programmer window, the device mentionned is the one you use. If not, either the one mentionned in the programmer window is the good one so you have to select in Assignements -> device your device, or the good is the one you selected in the Assignements -> device and then you have to change your system to fit your device. 

It may be a solution for your problem but I am not sure! 

 

Another solution is that the ptf file you selected in NIOS II IDE doesn't match the SOF file you enter in Quartus Programmer 

 

good luck 

 

éléa
0 Kudos
Reply