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Output driver settings for I/O pins

Altera_Forum
Honored Contributor II
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All, 

 

We have a design where electromagnetic coupling is causing signal 

degradation of output signals from our CPLD to neighbor CPLD connection to the point where edges are being misinterpreted. 

 

We are currently working on the problem but I would also like to know 

what if any settings some of you have used to maybe have a better 

signal quality on output drivers ? Increasing current driver strength will most likely not help us since the connection on our circuit board is approx 6 cm long from CPLD to the next IC.  

 

Thanks a bunch in advance !! 

Eric
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Altera_Forum
Honored Contributor II
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I think increasing current driver strength would indeed increase your problems since it is supposed to generate faster edges, then more emi. 

The solution is a better and emi aware pcb design, possibly inserting series termination resistances on long traces. But I guess you can't change anything in your actual pcb. 

Then you must somehow filter out the generated noise, but the optimal solution depends from several factors, i.e. operating frequency and type of signals involved.
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