Discovered that NIOS is little-endian so I converted my code to match and now the PFL reads the code from FLASH correctly.
My system is a little unique, I have a Coldfire CPU (Big-endian) running RTEMS which acts like a master on the Avalon bus. I have a CFI (common flash interface) SPOC component which I can interface to for remote FPGA updates. The Coldfire has control of the AC power outlet to allow power-cycling the development kit to upload the new code. This setup uses the Stratix II GX PCIe development kit, and soon will be upgrade to the Stratix IV GX kit. Hopefully this will work on the S4GX kit as well. NIOS is not used but I use the SPOC system heavily.
Thought this might be of some interest.
Nick
