PLL lock range on Cyclone V

[Altera_Forum]

I am using a PLL to generate clocks in an digital audio application, but the VCO range the PLL offers is unfortunately too narrow. Are there any techniques I can use (like pre-dividing the clock) to extend the lock range? 

 I want to lock on to a frequency which is ranging from 11MHz and up to 50MHz. I am able to configure the PLL to have a lock range from 10MHz to 26.6MHz. Of course, I am also able to achieve a range of 20MHz to 53.2MHz by altering the N and M values. Is it possible to alter these values runtime?

[Altera_Forum]

I don't know the specific nature of your requirements, but PLLs can be reconfigured "on the fly". You might have some up-front logic that measures the frequency of the incoming clock and configures the PLL accordingly.

[Altera_Forum]

The PLLs can also be cascaded to make say 50 or100 Mhz input clock into a 48 Khz audio clock.

[Altera_Forum]

I think the PLL cannot support a wide lock range. It will lose lock. You can use dynamic reconfiguration as gj_leeson mentioned to support different refclk and frequency.