PSPICE models for LVDS_IO

[Altera_Forum]

Hi, 

I was told that altera has SPICE models for the low-voltage differential signaling (LVDS) I/O pins. is it PSPICE or HSPICE and how can I get it ?   Thanks

[Altera_Forum]

AFAIK they only have IBIS models for the I/O pins. 

With a bit of work it is possible to make a SPICE model from the IBIS values but it isn't 100% accurate. If you have a simulator that can read IBIS models it would be a lot easier.

[Altera_Forum]

I found these two links related to the subject 

 http://www.altera.com/support/kdb/solutions/rd09052000_7585.html  http://www.altera.com/download/board-layout-test/ibis/ibs-ibis_index.jsp  I don't know which one is the model for low voltage differential signaling input/output. Also do you have any idea how can i use the model in my design ?

[Altera_Forum]

The knowledgebase entry is quite old and concerns old FPGAs, I don't think you'll find them for the modern ones. 

As for the second link, you must find the line corresponding to the FPGA you want to simulate, and download the .zip file. It contains IBIS models for all the I/O standards, including LVDS. The excel file (List of Models) can help you find which IBIS model from the .zip file you need to use. To use them, it depends on your simulator. If it can directly import IBIS models then you can use them there. If not you can try and build a spice model using voltage controlled sources. It is a bit technical and requires to read some documentation (both on SPICE controlled sources and how the IBIS models are made) and IIRC the resulting model isn't 100% accurate. I don't remember the specific details because I made this several years ago. If you can find a simulator that can directly use IBIS models it would be a lot easier.