Partial reconfiguration Time for a small block

[Altera_Forum]

Does any one have a handle on how long it might take to partially reconfig a small  

block in an ARRIA V FPGA.  I would like to reconfig some LVDS drivers out of a design. In one revision I would like   to have 10 LVDS drivers working, in a second revision, I would like to replace the   drivers with nothing, to reduce power.  I would like to be able to partially reconfig between the revisions.   From the little I understand of partial reconfiguration I would like to store the partial   reconfig file in on-chip memory and pull it out using the PR IP core. Nothing off chip   I am just looking for an idea of how long it might take to do this reconfigure. Is it 100's ms,   10's ms or in the microseconds.  Any thoughts would be warmly accepted  Best Regards  C

[Altera_Forum]

Why don't see datasheet?

[Altera_Forum]

because it isn't in the datasheet, or the user guide or the PR IP Core manual. There is no guidance at all. 

Looks like you can't use the internal host in the ARRIAV anyway which rules it out for my design