My question is about the Nstatus and ConfDone signals behavior when Nconfig is submitted to perturbations:
Assuming we have a 10kohm pull-up with the 3V3 on Nconfig as suggested by Altera's documentation, and a short but high perturbation occurs forcing Nconfig to less than 1V during a few hundreds nanoseconds, how does an Altera Cyclone IV e react? During this short amount of time, will the Users I/O turn to High Z? is the FPGA going in reset state? How about Nstatus and Confdone signals?
If the nCONFIG is driven LOW in short amount of time, the FPGA will go to RESET state.
And the USER I/Os are tri-stated until the device enters user mode.