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I am using Quartus Prime Pro 23.3.0.
I am trying to create a generic component from VHDL. (file attached)
After analyzing the file, I get the error message "The top-level module does not contain any signals." What would cause this?
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Hi,
Tested on 23.2 and 23.4 without any problem. Only 23.3 got the problem where interface and signals don't appear. I'll report this bug to engineering team. In the mean time, can use 23.4 as workaround.
Thanks,
Sheng
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Is there a reason why you are creating the component starting from a generic component instead of using the Component Editor? Using Component Editor would avoid this.
The error I think is because for a generic, you have to not only add the HDL code but you have to manually define all the signals and interfaces on the Signals & Interfaces tab. It doesn't automatically create these for you from the code the way the Component Editor does.
If you have the HDL code, which you do, there's little reason to not use the Component Editor.
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I'm doing it this way because this video from Intel https://youtu.be/ATouhNuEx2o?si=etoFToX9vrpQZ2kp demonstrated it.
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For the record, I get the same error with Component Editor.
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Hmm. So what does your Signals & Interfaces tab look like?
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According to the video, if you analyzed the HDL file, it should have tried to set up the signals and interfaces. If it's blank like this after analysis, then you would need to set them up yourself manually. Not sure why it is empty since your code looks fine, but this is why you're getting the error.
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Hi,
Tested on 23.2 and 23.4 without any problem. Only 23.3 got the problem where interface and signals don't appear. I'll report this bug to engineering team. In the mean time, can use 23.4 as workaround.
Thanks,
Sheng
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