Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21616 Discussions

Plating Thickness - EPM240T100A5N

Penguin1of3
Beginner
‎01-17-2023 12:53 PM
1,226 Views

Can anyone advise the plating thickness on Intel EPM240T100A5N?  I don't see it in the data sheet.

0 Kudos

Link Copied

3 Replies
Alberto_R_Intel
Employee
‎01-18-2023 11:38 AM
1,205 Views

Penguin1of3, Thank you for posting in the Intel® Communities Support.


I just transfer your thread to the proper department. They will further assist you with this matter as soon as possible.


Regards,

Albert R.


Intel Customer Support Technician


0 Kudos
Copy link
Penguin1of3
Beginner
‎01-25-2023 05:35 AM
1,156 Views
In response to Alberto_R_Intel

Any update?

In response to Alberto_R_Intel
0 Kudos
Copy link
Zawani_M_Intel
Employee
‎02-21-2023 05:29 PM
1,108 Views

Dear Pinguin1of3,


If you are referring to lead finger finish it is as table :


Thank you!




0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.