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Hi Altera Team,
We would like to whether all the power reduction techniques for HPS listed in the below link is implemented on bare metal(Power_optimisation.zip) for Cyclone V SOC development kit? https://www.altera.co.jp/documentation/iga1406135565764.html Various methods discussed in the link are listed below: hps method 1: fit code in cache hps method 2: processor standby modes and dynamic clock gating hps method 3: cpu1 in wfi/wfe or “standby loop” hps method 4: “suspend to ram”/sdram “self refresh” or “suspend to disk” hps method 5: lowering cpu frequency hps method 6: energy efficient ethernet hps method 7: usb power management hps method 8: unused peripherals in reset Please confirm. Thanks in advance Rabiammal ALink Copied
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Hi, you can file a service request to Altera to confirm, but my suspicion is that ethernet and USB are probably not in baremetal (I've not seen baremetal drivers for both of these). I am not sure about the processor related power saving techniques though.
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--- Quote Start --- Hi, you can file a service request to Altera to confirm, but my suspicion is that ethernet and USB are probably not in baremetal (I've not seen baremetal drivers for both of these). I am not sure about the processor related power saving techniques though. --- Quote End --- Hi sunshine, Thanks for the reply.

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