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Hello,
i am using Altera cyclone II EP2C35F672C6N kit. i have problem of downloading the code in that kit. Error led of board turned on when i was trying to download the code in to the kit, but when i was simulate that code that time i got correct result in waveform. my method is right because when i was try to download the code in to kit that time the .sof file is generate and it's configure the device but when i was click on start in .cdf window that time error led glows in the board and i could not get the correct result on board.i dont know how could i solve this porblem. can anyone please help me out? can you please tell me the whole procedure of how would i assign the pin no. and how would i download the code in the board in a right way becuase i think i have problem in pin assignment, i think i was doing a wrong pin assignment, so can you please send me a sample project file so i will understand my mistake. i am using altera cyclone II EP2C35F672C6N kit. can you please send me the pin assignment of this board. Thanks, HPPLink Copied
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Try assigning the unused pins as tri-stated.
Assignments->Device->Pins-Unused pins- Mark as New
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Thank your very much your reply,
I had already used as tri-stated but still i got errors. If anyone has datasheet of cyclone II nios II EP2C35F672C6N, will you please send me datasheet???- Mark as New
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Have you ever used tcl scripts?? I have the problem sometimes, and what I do is, I add all the standard pin assignments into my tcl script, and run it. So now, (after compilation) when you open the pin planner, every possible pin has an assignment. The you just change the pins that you are going to be using in the pin planner, and compile it again, and then the problem should hopefully go away.
I've attached the standard pin assignments as a *.txt file. If you need a step-by-step for the tcl script then let me know...- Mark as New
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Nios II EP2C35 kit has an errata about on board LEDs :
they are ON instead of OFF and inversely. or Maybe I don't understand the problem- Mark as New
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The pin number AA14 of the FPGA should be connected to a logic high (or high impedance) inside the RTL, this will solve the problem.
Actually the output pin AA14 of FPGA is connected to pld_RECONFIGREQ_n input pin of configuration PLD chip. Sorry for late reply.- Mark as New
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--- Quote Start --- Have you ever used tcl scripts?? I have the problem sometimes, and what I do is, I add all the standard pin assignments into my tcl script, and run it. So now, (after compilation) when you open the pin planner, every possible pin has an assignment. The you just change the pins that you are going to be using in the pin planner, and compile it again, and then the problem should hopefully go away. I've attached the standard pin assignments as a *.txt file. If you need a step-by-step for the tcl script then let me know... --- Quote End --- I would be actually really interested in knowing how to do it, I have never used TCL Scripts and I think it would extremely help me in my current design. Thanks in advance!
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Does anybody know what the pins for lan91c111 address and reset for that board are? I cannot find them anywhere and it is really halting my progress.... Thanks for any help!!
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SO do you have your pin assignment solved? I got the similar problem. Here I got a "reset_to_the_Lan91c111" pin and "write_clk_to_ddr_sdram" pin which I can't assign.

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