I am having a problem programming a configuration flash connected to the Arria 10 FPGA. We are using CvP to boo the FPGA which is connected to the PCIE bus with a Linux host computer. The peripheral configuration is typically programmed to the flash using the Quartus programmer and a USB Blaster JTAG device. The core RBF file is programmed after boot by the host PC. All of this is working reliably as expected. We want to be able to field upgrade the peripheral load in the configuration flash, so we have added an interface to access the config flash. I have tried both the QSPI Config II IP module, and the ASMI II module. In both cases I am able to write the flash and verify the write data sometimes, but other times there are bit/byte errors at apparently random locations. I have tried changing the clock speed and the results have been the same. Since we have no problems with programming with the Quartus tool, the hardware seems to be OK. What else can I look at regarding this interface to troubleshoot the problem. Here is the information about the current setup:
I'd appreciate any help with where to look to resolve this issue.
Edit: One more piece of information. The errors are always in the same place, and after a power cycle, the write process either always works, or always fails with errors in the same places (not on block boundaries).
I would recommend you to use "https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-gen-sfi.pdf" Generic Serial Flash Controller IP which should let you make the setting for the specific flash you are using.
Thank you for your help. I'm reading through the documentation now. Currently, we are using version 17.1 of the tools. From the document, it looks like this IP is only available in 18.0 and later, correct?