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Altera_Forum
Honored Contributor I
1,511 Views

Problem with MAX 10 pin assignment

Hi all, 

I'm currently using the MAX 10 (10M02SCU169A7G) for one our project. In MAX 10 (10M0) fpga the pin C4 and C5 are nSTATUS and CONFIG_DONE respectively. 

And we have used this pin for some other purpose also. As per the datasheet both these pins are dual purpose pins. When i do the I/O Assignment analysis i am getting the following errors. 

 

Error (176310): Can't place multiple pins assigned to pin location Pin_C4 (IOPAD_X3_Y7_N14) 

Info (176311): Pin MR is assigned to pin location Pin_C4 (IOPAD_X3_Y7_N14) 

Info (176311): Pin ~ALTERA_nSTATUS~ is assigned to pin location Pin_C4 (IOPAD_X3_Y7_N14) 

 

In some forums giving solutions like "change the settings of dual purpose pins in the quartus software" but i am not able do this because the window for this settings in quartus software is grayed out (Attaching the screenshot) 

https://alteraforum.com/forum/attachment.php?attachmentid=14700&stc=1  

Is there any other way i can avoid this error?...
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4 Replies
Altera_Forum
Honored Contributor I
173 Views

Hi, 

 

1.Which version of quartus tool you using? 

 

Similar issues is discussed in below thread. 

https://www.alteraforum.com/forum/showthread.php?t=24146 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
173 Views

 

--- Quote Start ---  

Hi, 

 

1.Which version of quartus tool you using? 

 

Similar issues is discussed in below thread. 

https://www.alteraforum.com/forum/showthread.php?t=24146 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation) 

--- Quote End ---  

 

 

I am currently using Quartus 17.0
Altera_Forum
Honored Contributor I
173 Views

Hi, 

 

Have you checked the thread attached in previous post? 

Can you try with the instruction given in the thread and check once. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
173 Views

Hi, 

 

To use the configuration and JTAG pins as user I/O in user mode, you must do the following in the 

Quartus Prime software: 

1. On the Assignments menu, click Device. 

2. Click Device and Pin Options. 

3. Select the General tab of Device and Pin Options. 

4. In the General Options list, do the following: 

• Check the Enable JTAG pin sharing. 

• Uncheck the Enable nCONFIG, nSTATUS, and CONF_DONE pins. 

 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/max-10/m10_handbook.pd... No 496 

https://www.alteraforum.com/forum/attachment.php?attachmentid=14811  

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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