Programming Cyclone IV FPGA using USB Blaster Rev A

[Altera_Forum]

Hi, 

 Is is possible to program Cyclone IV E FPGA with USB BLASTER Rev. A cable? I am facing "JTAG chain Broken error" when trying to program a custom board using JTAG interface. I am able to successfully program EPCS configuration memory on the board with AS interface.  Thanks

[Altera_Forum]

Yes that is possible. See this document: https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf 

 See figure 8 - 29. Also you will need to program using a .jic file. Use convert programming to create a jic file from your sof and hex (elf) files.

[Altera_Forum]

--- Quote Start ---  Yes that is possible. See this document: https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf  See figure 8 - 29. Also you will need to program using a .jic file. Use convert programming to create a jic file from your sof and hex (elf) files.  --- Quote End ---    My hardware setup is according to Fig 8-28. When I try to upload *.sof file using JTAG interface I get the error "Unable to read device chain", while programming of *.pof files is successful in AS mode using a separate header as in Fig 8-28.   I am wondering if there is an issue of device support, as the user manual of USB BLASTER II (Rev C) indicates support for Cyclone IV devices while the user manual of USB BLASTER Rev A does not.   https://www.altera.com/literature/ug/ug_usb_blstr.pdf  https://www.altera.com/en_us/pdfs/.../ug/ug_usb_blstr_ii_cable.pdf

[Altera_Forum]

The Rev A should be OK with the Cyclone IV. It probably hadn't been released when the manual was written. 

There is probably something wrong with the JTAG interface on your PCB.

[Altera_Forum]

Yes, make sure your JTAG voltage is 2.5V (VCCA), and make sure your schematic and PCB layout matches the diagram.

[Altera_Forum]

OK, then there might be some problem in my board, as even though I can upload configuration data to EPCS memory the FPGA doesn't configures itself and CONFIG_DONE pin  

remains LOW after power-up ( while nSTATUS is High ). The voltage distribution on my board is as follows:  VCCIO ( All Banks ) = 3.3V VCCA = 2.5V VCCINT = 1.2V  So far I can only suspect some broken track on the board, as schematic and PCB layout are according to Fig 8-28.