Quartus SoC Compiler Warnings

[Altera_Forum]

When an SoC design generated by Qsys is compiled in quartus there are a bunch of warnings generated. In the training classes they always tell us to ignore these warnings. In general, I like to know the cause of each warning before I decide to ignore it. That said, I came across a set of warnings today in my own design that I do not see when I compile the example design from the training class: 

Critical Warning (127003): Can't find Memory Initialization File or Hexadecimal (Intel-Format) File .../hps_AC_ROM.hex -- setting all initial values to 0  Critical Warning (127003): Can't find Memory Initialization File or Hexadecimal (Intel-Format) File .../hps_inst_ROM.hex -- setting all initial values to 0   My design only instantiates the hps and nothing else. Also I compiled the example design from the training class using 13.0 and my design using 13.0sp1. I don't think this is the difference, but maybe it is?  I appreciate any insight. Thanks.

[Altera_Forum]

I have a hunch what those are but I have asked someone else to take a look and comment. Quartus can't preinitialize a memory inside the HPS block so you should be able to safely ignore those if the HPS is the only IP in your entire Quartus design. If you added on-chip memories and connected them to the HPS block then it's probably those memories causing the messages you are seeing, to double check that double click on them to edit the memory settings and you should see those two .hex files referenced in the GUI.

[Altera_Forum]

I only have the hps instantiated (no on-chip memories). I'm curious to see what your hunch is. Thanks.

[Altera_Forum]

Short answer is to ignore them (real answer is long winded).

[Altera_Forum]

Thanks for the update. I would love to hear the long answer, but I can accept the short answer. Somewhere in the process of making assignments in my .qsf file, these warnings went away. I'm not sure why.

[Altera_Forum]

Might have been that those inilitalization files were referenced in the .qsf and you removed them while editing the .qsf. The long winded answer didn't make much sense to me so I asked them to clarify it.  

 You probably already know this but just in case... if you edit the .qsf directly make sure Quartus is closed so that it doesn't override your changes later with stale information.

[Altera_Forum]

I edit the .qsf all the time. I usually close the project in quartus, before I edit the .qsf. This is a little quicker than totally shutting down quartus.

[Altera_Forum]

--- Quote Start ---  When an SoC design generated by Qsys is compiled in quartus there are a bunch of warnings generated. In the training classes they always tell us to ignore these warnings. In general, I like to know the cause of each warning before I decide to ignore it. That said, I came across a set of warnings today in my own design that I do not see when I compile the example design from the training class: Critical Warning (127003): Can't find Memory Initialization File or Hexadecimal (Intel-Format) File .../hps_AC_ROM.hex -- setting all initial values to 0  Critical Warning (127003): Can't find Memory Initialization File or Hexadecimal (Intel-Format) File .../hps_inst_ROM.hex -- setting all initial values to 0   My design only instantiates the hps and nothing else. Also I compiled the example design from the training class using 13.0 and my design using 13.0sp1. I don't think this is the difference, but maybe it is?  I appreciate any insight. Thanks.  --- Quote End ---     Help: http://quartushelp.altera.com/13.0/mergedprojects/msgs/msgs.htm#msgs/wcdb_cdb_file_not_found.htm  Just skip this critical warning message.  ZS.V.