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Hi All.
I need to send data continously at 2Gbps from FPGA to CMOS chip. I found that LVDS can supprot up to 1.4Gbps on data sheet (Starix V). And 2Gbps seems to be achievable if I use built-in transceivers. In this case, I am considering Rapid Serial IO because it seems to be the simplest IO standard (is it right?). So, I have three questions. First, what is the practical speed limit of LVDS? Even though the max speed of LVDS on data sheet is 1.4Gbps, I think it is very challenging to make it operate at 1.4Gbps in the practical situations. I think the practical speed will be lower than 1.4 Gbps. Second, I found 'Avalon Interface Specifications' provided by Altera, and there is a chapter for Avalon Streaming (Avalon-ST) from p.35. It seems I can use Avalon-ST interfaces for continuous data streaming. Am I correct? If yes, can I use SRIO without packet? Third, SRIO has predefined data rate. Is there anyother IO standard that I can control data rate? I need 2Gbps. Thanks you for reading my queations.Link Copied
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--- Quote Start --- I need to send data continously at 2Gbps from FPGA to CMOS chip. --- Quote End --- Serial data streams usually have some form of protocol layered on them, so that the receiving device can determine where data starts, and how to regenerate bytes from the serial stream. How does the CMOS device determine the clock of the serial stream, is it separate, or does it recover the clock from the serial stream? You need to determine that information first. You would most likely need to use a high-speed transceiver in 'basic' mode, where you control the serial protocol completely - and you would write code to match the protocol expected by the CMOS camera. Cheers, Dave

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