I am fairly new writing Verilog and was wondering if Altera offers a IP module to do SPI communications? I am doing a project for myself where I need to load and control four different counters and would like to do this using a simple SPI slave function between my external processor and my custom programmable logic. I am thinking of using a MAX7000 series CPLD to do both the counters and spi interface. Any advise or hints would be greatly appreciated!
There is "SPI Slave to Avalon Master bridge" So you have use your external CPU and the CPU can control FPGA via SPI bus. You still should be able to use SOPC builder in CPLD.
