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Altera_Forum
Honored Contributor I
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Reading from a FIFO with DMA

Hello, I am trying to use a DMA to read from a FIFO. To see if this is working I write and read from the same FIFO, expecting to see always the same data, but I see only half of them! It seems that the FIFO outputs data faster than the DMA is expecting, for example: 

Input Output 

0 0 

1024 2048 

2048 4096 

3072  

4096 

 

I attach my qsys connections and the C program I use to drive the DMA 

 

//writes to the fifo //configure the DMA controller for transfer _DMA_REG_STATUS(h2p_lw_dma_addr)=0; _DMA_REG_READ_ADDR(h2p_lw_dma_addr)=ONCHIP_MEMORY2_0_BASE; //read from ROM _DMA_REG_WRITE_ADDR(h2p_lw_dma_addr)=FIFO_BASE; //write to FIFO _DMA_REG_LENGTH(h2p_lw_dma_addr)=4*100; //write 100x 4bytes //start the transfer _DMA_REG_CONTROL(h2p_lw_dma_addr)=_DMA_CTR_WORD | _DMA_CTR_GO | _DMA_CTR_LEEN | _DMA_CTR_WCON; //reads from the fifo //configure the DMA controller for transfer _DMA_REG_STATUS(h2p_lw_dma_addr)=0; _DMA_REG_READ_ADDR(h2p_lw_dma_addr)=FIFO_BASE; _DMA_REG_WRITE_ADDR(h2p_lw_dma_addr)=ONCHIP_MEMORY2_0_BASE; _DMA_REG_LENGTH(h2p_lw_dma_addr)=4*100; //write 100x 4bytes //start the transfer _DMA_REG_CONTROL(h2p_lw_dma_addr)=_DMA_CTR_WORD | _DMA_CTR_GO | _DMA_CTR_LEEN | _DMA_CTR_RCON;  

I have tested this code writing from RAM to RAM and it works, the addresses are correct and the DMA initiates the transfer correctly, it just misses the data, can you help me? 

 

http://www.alteraforum.com/forum/attachment.php?attachmentid=13179&stc=1
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