Hello All,
For mass production, we should choose low cost IC. And I have a question here, for low cost IC(eg. CPLD MAX II), is it possible to realize simple band filter function and auto gain control function? If possible, would you please help share these design or suggestion with me? Thanks a lot in advance.:) Best Wishes, Mark链接已复制
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How "simple"? What resolution are you after? Sample rate? You might be able to realise a particularly simple implementation of this in MAX II...
Put a design together and run it through Quartus. It'll suggest a part. Having done that you can play around with different target parts, including MAX II. Cheers, Alex--- Quote Start --- How "simple"? What resolution are you after? Sample rate? You might be able to realise a particularly simple implementation of this in MAX II... Put a design together and run it through Quartus. It'll suggest a part. Having done that you can play around with different target parts, including MAX II. Cheers, Alex --- Quote End --- Hello Alex, Many thanks for your reply. The resolution is only 20 KHz. What I really want make sure is how to realize FIR in MAX II. Do you have any suggestion? Thanks a lot. Best, Mark
Altera do an FIR IP core. See page 1-3 of the 'fir ii ip core user guide (https://www.altera.com/literature/ug/ug_fir_compiler_ii.pdf)' for the device families supported. This shows the families supported. Note: no MAX II. Doesn't mean it can't be done - you'll have to write your own. Just means Altera decided MAX II can't/shouldn't be supported with this core, possibly because that family is too small or a little old.
Cheers, Alex--- Quote Start --- Hello Alex, Many thanks for your reply. The resolution is only 20 KHz. What I really want make sure is how to realize FIR in MAX II. Do you have any suggestion? Thanks a lot. Best, Mark --- Quote End --- Have you worked out how many taps you need. There are no dedicated mults in max II (as far as I know) so you will need to use adders to do the multiplication.
--- Quote Start --- Altera do an FIR IP core. See page 1-3 of the 'fir ii ip core user guide (https://www.altera.com/literature/ug/ug_fir_compiler_ii.pdf)' for the device families supported. This shows the families supported. Note: no MAX II. Doesn't mean it can't be done - you'll have to write your own. Just means Altera decided MAX II can't/shouldn't be supported with this core, possibly because that family is too small or a little old. Cheers, Alex --- Quote End --- Yes, I got your meaning. Many thanks. BTW, does Altera have related reference design(FIR) for low cost CPLD (MAX II)? Thanks. Best, Mark
--- Quote Start --- Have you worked out how many taps you need. There are no dedicated mults in max II (as far as I know) so you will need to use adders to do the multiplication. --- Quote End --- Many thanks for your suggestion. I think 8 taps is enough for my design. Then I have to try write down code to realize FIR function. And I am really worried about its poor resources, just try. Thanks again. Best, Mark
--- Quote Start --- Many thanks for your suggestion. I think 8 taps is enough for my design. Then I have to try write down code to realize FIR function. And I am really worried about its poor resources, just try. Thanks again. Best, Mark --- Quote End --- if your filter is symmetrical then 8 taps require 4 mults. if you can force one to be power of 2 then it reduces to 3 mults. The three mults can be implemented as adders e.g. if your coeff is 778 (11 bits signed) then 778 = 2^9 + 2^8 + 2^3 + 2 (4+2 +1 =7 adders) This means zero extend LSBs of input by 9,8,3 and 1 bits then add up all terms. Finally discard LSBs from result as per your final gain
--- Quote Start --- if your filter is symmetrical then 8 taps require 4 mults. if you can force one to be power of 2 then it reduces to 3 mults. The three mults can be implemented as adders e.g. if your coeff is 778 (11 bits signed) then 778 = 2^9 + 2^8 + 2^3 + 2 (4+2 +1 =7 adders) This means zero extend LSBs of input by 9,8,3 and 1 bits then add up all terms. Finally discard LSBs from result as per your final gain --- Quote End --- Your suggestion is very good to me. Thank you very much. According to your suggestion, I will try to realize FIR using several mults and adders. If possible, I will let you know the results. Thanks again. Best, Mark
