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Refresh DDR2 in normal process!

Altera_Forum
Honored Contributor II
‎12-27-2007 03:40 AM
963 Views

Hi, 

In normal operation, if the READ and WRITE commands are used frenquently, is it necessary to use REFRESH command for DDR2 SDRAM?  

And other questions: 

1- Which method is better, changing Bank address whenever I issue READ or WRITE command or changing Bank address when the Bank address is full? 

2- If I want to run high frequency with my DDR2 SDRAM, which method I should improve? 

 

Now I use the normal bidirectional interface between my FPGA with DDR2 SDRAM. 

Thanks in advance!
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