Registers with preset signals will power-up high

[Altera_Forum]

Hi All, 

 I am wondering if someone could explain this Info to me:  Info: Registers with preset signals will power-up high.  I have a value set for this register when I declare it. Also when I click on the info, it takes me to the register in question. I am wondering why that register is being singled out for power-up high when I have very similar register around it. The simulation result and the synthesized results are very different and I am now at the point where I think that info is the key. I have read around about power up conditions and the like but decided to start a new thread so I apologize if it seems repetitive.   Also, would this have anything to do with that register being used as an asynchronous reset? Not sure if that makes sense but one of the threads I read mentioned it so I am wondering if they are related. (can't post the link but the title of it is very different simulation results of a simple counte)   Here is the part of the design in question (the reg that gets singled out is 'count_enable'):  always @(posedge a_sig)  begin  if(count_enable)  begin  temp_count <= temp_count + 1;  reset_count <= 1'b0;  end  else   begin  a_count2 = temp_count;  temp_count <= 8'b0000000;  reset_count <= 1'b1;  end  end   always @(posedge reset_count or posedge clk)  begin  if(reset_count)  begin  count_enable = 1'b1;  end  else  begin  count_enable = 1'b0;  end  end   It simulates perfectly but doesn't materialize on the cpld. I have another design that uses similar code but simulates and synthesizes ok. So I am very confused about this. Many, many thanks for reading

[Altera_Forum]

Quite simply, if a register is reset to nonzero by the user then the compiler assumes that a nonzero at powerup wouldn't matter. 

 Otherwise registers will power up at zero unless you change the setting of powerup don't care.  It really shouldn't matter functionally if your intended reset value is nonzero.  check your two processes if one is waiting for the other in infinite loop

[Altera_Forum]

Thanks for the reply. What if your intended power up value for the register is 0? Why does it end up powering up high?

[Altera_Forum]

In that case, you should reset to zero. 

check your two processes, it could be one signal is waiting for other...

[Altera_Forum]

Thanks again. I reset to zero.