Remote JTAG access with custom hardware server

[Yashwant]

Hi,

I am looking for a solution to implement custom remote debugging of intel FPGA.

I have been made myself familiar with below possibilities.

• Remote PC (Quartus Prime ; Hardware setting as TCP/IP client)
• Target PC (Quartus Prime ; Hardware setting as TCP/IP Server), connected with INTEL FPGA hardware using INTEL USB blaster.

also, Remote FPGA Debug for Stratix 10 | Documentation | RocketBoards.org ; here  JTAG over IP has been described, what I need is pure JTAG signals as output, which can be connected to any INTEL FPGA.

Xilinx has XVC protocol which converts TCP/IP packets into JTAG data.

Does Intel have any similar protocol which can be used to to create custom server without using INTEL SoC or Intel Hard processor , JTAG over IP.

My goal :

• Remote PC (Quartus Prime ; Hardware setting as client)
• Target  system ; Microcontroller  with ethernet(TCP/IP server) and connected with INTEL FPGA hardware using JTAG(GPIO of microcontroller ).

I want to replace PC with Quartus Prime ; Hardware setting as TCP/IP Server +INTEL USB blaster  with Microcontroller with  Ethernet(TCP/IP server) + Software witch convert TCP/IP data to JTAG(GPIO of microcontroller) .

Any suggestions would be highly appreciated.

[Paveetirra_Srie]

Hi Yashwant,

I believe you're trying to look for ways to convert TCP/IP data to JTAG .

Hope the below link will help you:

https://www.intel.com/content/www/us/en/docs/programmable/728673/21-3/jtag-over-protocol-communication-with.html

Regards,

Pavee

[Yashwant]

Hello Paveetira,

Thank you for the suggestion.

I have read the JTAG over protocol. what I understood :  it is used to avoid using the existing JTAG pins for the debug.

Yes it communicates with TCP/IP sever with open source etherlink (GitHub - altera-opensource/remote-debug-for-intel-fpga: This is a software reference code to implement the FPGA remote debug feature. User will compile the reference code into a user space application which exchanged date with Quartus tool via TCP/IP.) .

The etherlink output is  PCIe MMIO transactions, which further communicated to  L-Tile Avalon MM Intel FPGA IPf or PCIe then to JTAG over IP.

What is am looking is pure JTAG signals as output, could you please share your views on this ???

[Paveetirra_Srie]

Hi Yashwant,

Good day to you.

Completely understand your request but we doesnt support protocol which converts TCP/IP packets into pure JTAG data.

What we have is JTAG-Over-Protocol Intel FPGA IP but as you've mentioned, it does not provide pure JTAG data as you're looking for.

Kindly do let me know if you've any other question, happy to clarify it for you.

Regards,

Pavee

[Yashwant]

Hello Paveetira,

Thank you for the clarification.

Have a nice day.

Kind regards

Yashwant Rao

[Paveetirra_Srie]

Hi Yashwant,

I’m glad that your question has been addressed, I now transition this thread to community support. 

If you have a new question, feel free to open a new thread to get the support from Intel experts.

Regards,

Pavee