SDRAM problem on DE0 EP3C16F484C6

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CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

SDRAM problem on DE0 EP3C16F484C6

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Hi,

I am using DE0 - EP3C16F484C6 board and have timing issue with SDRAM. When I interface SDRAM in Qsys, it generates Qsys successfully and also compiles on Quartus with some timing errors.

When I program it on my board and run a simple program on NiosII t gives 'Downloading elf Process failed'.

The data sheet for the SDRAM does not have all the configuration parameters needed by Qsys. So I am guessing there are some setup and holdtime warning due to this which is not allowing me to run any simple program on NiosII.

I have attached images of the errors and warning. .Please let me know what configurations are needed and if you want anymore details from my side

Thanks

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