Dear All,
I'm conducting SI analysis of Cyclone V with LPDDR2 (Micron MT42L32M16D1AB-3).
It is observed that there is a problematic ringing phenomenon on the edge of waveform.
https://www.alteraforum.com/forum/attachment.php?attachmentid=7436 I'm using a Quartus II generated IBIS model.
Termination setting is R34 CAL on Cyclone V HSUL-12, ZQ40 on Memory End.
(referred to [ALTERA External Memory Interface Handbook])
The clock frequency is 250MHz.
Even if it is assumed that the line impedance setting is ideal 50ohm and the line length setting is as short as possible, the waveform ripples.
Have someone conducted SI analysis of Cyclone V with LPDDR2?
How was the waveform? How were the settings at that time?
