SOPC New Component Control 7 Segment LED

Altera_Forum · ‎03-06-2011

Hi every body,

I'm a newbie in SoPC. I use DE2.

I want to create a new component connect to Avalon Switch Fabric (ASF).

This component uses to control 7 segment LED.

ASF will create write signal and send writedata to component. Base on writedata my component will control to show on 7 segment LED.

example:

+ when receive writedata [15:0]= 1000 0000 0000 1010

this component will output character "A" (1010) to HEX7

+ when receive writedata [15:0]= 0010 0000 0000 1100

this component will output character "C" (1100) to HEX5

+ when receive writedata [15:0]= 0000 0001 0000 1001

this component will output character "9" (1001) to HEX0

....

I write my code, but I don't know it is correct or not.

Hope you can help me to correct my code.

Thank you.

my code:


module control_led7seg(
clk,
reset_n,
cs,
write,
write_data
);
input clk;
input reset_n;
input cs; // Chip select
input write; // Write request
//write_data: 16-bit --> HHHH HHHH xxxx DDDD
//8 bit H to indicate Led 7 segment i
//4 bit D to indicate data written to HEX i
input  write_data; // Write data: 0 1 2 3 4 5 6 7 8 9 a b c d e f
reg  write_data;
reg  seg;//Thanh ghi chua data dc write ra HEX
reg   HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7;
always @ (posedge clk)
begin
if(~reset_n)
    begin
    HEX0 <= 'h0;
    HEX1 <= 'h0;
    HEX2 <= 'h0;
    HEX3 <= 'h0;
    HEX4 <= 'h0;
    HEX5 <= 'h0;
    HEX6 <= 'h0;
    HEX7 <= 'h0;
    end
else
    begin
        if(cs)
            begin
                if (write)
                        begin
                            case (write_data)
                                4'h0: seg = 7'b1000000;
                                4'h1: seg = 7'b1111001;     // ---a----
                                4'h2: seg = 7'b0100100;     // |      |
                                4'h3: seg = 7'b0110000;     // f      b
                                4'h4: seg = 7'b0011001;     // |      |
                                4'h5: seg = 7'b0010010;     // ---g----
                                4'h6: seg = 7'b0000010;     // |      |
                                4'h7: seg = 7'b1111000;     // e      c
                                4'h8: seg = 7'b0000000;     // |      |
                                4'h9: seg = 7'b0011000;     // ---d----
                                4'ha: seg = 7'b0001000;
                                4'hb: seg = 7'b0000011;
                                4'hc: seg = 7'b1000110;
                                4'hd: seg = 7'b0100001;
                                4'he: seg = 7'b0000110;
                                4'hf: seg = 7'b0001110;
                            endcase
                                if (write_data == 1'b1)
                                    HEX7 = seg;
                                else HEX7 = 7'b1000000
                                
                                if (write_data == 1'b1)
                                    HEX6 = seg;
                                else HEX6 = 7'b1000000
                                
                                if (write_data == 1'b1)
                                    HEX5 = seg;
                                else HEX5 = 7'b1000000
                                
                                if (write_data == 1'b1)
                                    HEX4 = seg;
                                else HEX4 = 7'b1000000
                                
                                if (write_data == 1'b1)
                                    HEX3 = seg;
                                else HEX3 = 7'b1000000
                                
                                if (write_data == 1'b1)
                                    HEX2 = seg;
                                else HEX2 = 7'b1000000
                                
                                if (write_data == 1'b1)
                                    HEX1 = seg;
                                else HEX1 = 7'b1000000
                                
                                if (write_data == 1'b1)
                                    HEX0 = seg;
                                else HEX0 = 7'b1000000
                        end     
            end   
    end  
end  
endmodule

Altera_Forum · ‎03-07-2011

hello.

have you check this source somehow?

you can check it in modelsim( you can download it from Altera web site)

or QuartusII can compile it.

I have found some errors.

1.write_data

it can't be a register. it is an input-bus.

2.syntax

the line "else HEX7 = 7'b1000000"

you need semicolon.

this is just a syntax error.

3. logical error.

you don't have output.

a module which has no output doesn't make sense.

those are my advice as far as I found.

Altera_Forum · ‎03-08-2011

Dear akira,

Thanks for your advice.

Best Regard.