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Altera_Forum
Honored Contributor I
1,671 Views

Scrolling Text - 7 Segment Display on DE0-CV

I would like to make scrolling text with the six 7 segment displays on the DE0-CV. I am trying to implement this project using VHDL. I am unsure how to approach this because I am unsure how to create an array that would cover all the pins from the six 7 segment displays. I do see that HEX0 has 7 assignments in the assignment editor and they are assigned like this (by using the system builder from the DE0-CV_v.1.2.1_SystemCD).http://www.alteraforum.com/forum/attachment.php?attachmentid=13067&stc=1  

 

Would it be possible to create one output that could handle all the pins from the six 7 segment displays? I will also attach the vhdl code I have so far (mostly guessing and checking). 

 

LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY hexscroll IS PORT( CLOCK_50 : IN STD_LOGIC; HEX0 : OUT STD_LOGIC_VECTOR(6 downto 0); HEX1 : OUT STD_LOGIC_VECTOR(6 downto 0); HEX2 : OUT STD_LOGIC_VECTOR(6 downto 0); HEX3 : OUT STD_LOGIC_VECTOR(6 downto 0); HEX4 : OUT STD_LOGIC_VECTOR(6 downto 0); HEX5 : OUT STD_LOGIC_VECTOR(6 downto 0)); END hexscroll; ARCHITECTURE blinkled OF hexscroll IS SIGNAL pulse : STD_LOGIC_VECTOR (6 downto 0) := B"010_0100";--variable to hold value of LED SIGNAL count : INTEGER RANGE 0 TO 49999999 := 0; --counter variable TYPE HEX IS ARRAY (41 downto 0) OF STD_LOGIC; BEGIN counter:PROCESS (CLOCK_50) BEGIN IF CLOCK_50'EVENT AND CLOCK_50 = '1' THEN IF count = 49999999 THEN count <= 0; pulse <= NOT pulse; ELSE count <= count + 1; END IF; END IF; END PROCESS counter; HEX0(6 downto 0) <= pulse;--B"111_1001"; --HEX0(6 downto 0) <= (others => pulse); --HEX0(6 downto 0) <= B"111_1001"; --HEX1(6 downto 0) <= B"000_1000"; --HEX2(6 downto 0) <= B"000_1100"; --HEX3(6 downto 0) <= B"100_1000"; --HEX4(6 downto 0) <= B"000_0110"; --HEX5(6 downto 0) <= B"001_0010"; END blinkled;
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Altera_Forum
Honored Contributor I
205 Views

Dont create an array of std_logic, you're just redifining the std_logic_vector type. Just create an array of std_logic_vector in a package, then import it into your entity: 

 

package my_types_pkg is type hexout_array_t is array(0 to 5) of std_logic_vector(6 downto 0); end package; .... use work.my_types_pkg.all; entity hexscroll is port ( hexout : hexout_array_t ); end entity hexscroll;
Altera_Forum
Honored Contributor I
205 Views

Alright, before I waste my time guessing on what to do, would I assign all the pins to hexout or would I instead somehow fill the array (hexout) with HEX0 to HEX5 (which already have the pins assigned to them)? Here is the code I have come up with so far. I tried to assign the HEX0-HEX5 to the hexout, but error showed up saying I had to change them to a buffer type. 

 

LIBRARY ieee;USE ieee.std_logic_1164.all; USE work.my_types_pkg.all; ENTITY hexscroll IS PORT( CLOCK_50 : IN STD_LOGIC; hexout : OUT hexout_array_t; HEX0 : BUFFER STD_LOGIC_VECTOR(6 downto 0); HEX1 : BUFFER STD_LOGIC_VECTOR(6 downto 0); HEX2 : BUFFER STD_LOGIC_VECTOR(6 downto 0); HEX3 : BUFFER STD_LOGIC_VECTOR(6 downto 0); HEX4 : BUFFER STD_LOGIC_VECTOR(6 downto 0); HEX5 : BUFFER STD_LOGIC_VECTOR(6 downto 0)); END hexscroll; ARCHITECTURE blinkled OF hexscroll IS SIGNAL pulse : STD_LOGIC_VECTOR (6 downto 0) := B"010_0100";--variable to hold value of LED SIGNAL count : INTEGER RANGE 0 TO 49999999 := 0; --counter variable BEGIN counter:PROCESS (CLOCK_50) BEGIN hexout <= (HEX0, HEX1, HEX2, HEX3, HEX4, HEX5); IF CLOCK_50'EVENT AND CLOCK_50 = '1' THEN IF count = 49999999 THEN count <= 0; pulse <= NOT pulse; ELSE count <= count + 1; END IF; END IF; END PROCESS counter; --hexout <= ??? END blinkled; 

LIBRARY IEEE;USE ieee.std_logic_1164.all; PACKAGE my_types_pkg IS TYPE hexout_array_t IS ARRAY(0 to 5) OF STD_LOGIC_VECTOR(6 downto 0); END PACKAGE;
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