Setting location for PLL_x

[Altera_Forum]

Hi, 

 For my design, I'm using a cyclone III /w PLL in compensated mode. So I noticed Quartus will usually automatically use the correct PLL based on the clock input if there is a single clock input going to a single instance of a PLL megafunction. By correct, I mean Cyclone III has restrictions on which clock input can be used for each PLL if compensated mode is used.  However if I assign two PLL to the same dedicated clock input, with one PLL in compensated mode and the other PLL in non-compensated mode, I noticed on my design anyways, Quartus assigned the compensated PLL instance to to a location that can not support compensatated mode given the clock input. Then the PLL which could support compenstated mode was assigned the instance which did not need to use this mode.  I got around the issue, but I would like to know how to force Quartus to assign a particular instance to a particular device resource. In cyclone 3 they label the PLL as PLL_1, PLL_2, ...  Any comments are appreciated.

[Altera_Forum]

If you backannotate the entire design, you will see the assignments to the PLLs. You can then change these to the locations you want and delete all the assignments you don't want from the backannotation. There are scripts that do this more eloquently, but this method is very simple.

[Altera_Forum]

I ran up against this recently. Google "choose pll site:www.alteraforum.com" for more answers.

[Altera_Forum]

My design is the 'Block diagram/schematic file' type. 

 Select the PLL -> right click the mouse -> Locate->Locate in Assignment Editor -> Location(Assignment name)-> PLL_x(Value)

[Altera_Forum]

Thank all for the replies. 

   --- Quote Start ---  My design is the 'Block diagram/schematic file' type.   Select the PLL -> right click the mouse -> Locate->Locate in Assignment Editor -> Location(Assignment name)-> PLL_x(Value)  --- Quote End ---    I found you can right click in the other views as well as done the same thing. I used the hierarchy and technology view the same way to automatically set the long wordy net name in the assignment editor.