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Hi All!
When i compile the following code: (Quartus) entity ISA is port --from ISA to CPU (AEN_IN,IOR_IN,IOW_IN :inout std_logic; ADDR_IN : inout std_logic_vector(10 downto 0); DATA_IN :inout std_logic_vector(7 downto 0); --from CPU to ISA DATA_OUT :inout std_logic_vector(7 downto 0) ); end ISA; architecture arch of ISA is signal DATA_BUF : std_logic_vector(7 downto 0); begin process(IOW_IN,IOR_IN) begin --write operation if IOW_IN'event and IOW_IN = '0' then if ADDR_IN = B"01000011000" AND AEN_IN ='0' then DATA_BUF <= DATA_IN ; DATA_OUT <= DATA_BUF ; else DATA_OUT <= "ZZZZZZZZ"; end if; end if; --read operation if IOR_IN'event and IOR_IN = '0' then if ADDR_IN = B"01000011000" AND AEN_IN ='0' then DATA_IN <= DATA_OUT; end if; end if; end process; end arch; I get warnings: Warning: The bidir "AEN_IN" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "IOR_IN" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "IOW_IN" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[0]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[1]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[2]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[3]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[4]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[5]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[6]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[7]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[8]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[9]" has no source; inserted an always disabled tri-state buffer. Warning: The bidir "ADDR_IN[10]" has no source; inserted an always disabled tri-state buffer. Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[0]~7 that it feeds Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[1]~6 that it feeds Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[2]~5 that it feeds Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[3]~4 that it feeds Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[4]~3 that it feeds Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[5]~2 that it feeds Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[6]~1 that it feeds Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus DATA_IN[7]~0 that it feeds Warning: TRI or OPNDRN buffers permanently enabled Warning: Node "DATA_IN[0]~16" Warning: Node "DATA_IN[1]~17" Warning: Node "DATA_IN[2]~18" Warning: Node "DATA_IN[3]~19" Warning: Node "DATA_IN[4]~20" Warning: Node "DATA_IN[5]~21" Warning: Node "DATA_IN[6]~22" Warning: Node "DATA_IN[7]~23" And i have no idea what the warnings mean. Could someone help me to figure it out? Thanks!コピーされたリンク
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You've defined the signals as INOUT but only used them as inputs so it has disabled the tri state buffer because it never ouputs a value.
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Thanks for the valuable information.
Actually DATA_IN is bidirectional, i read from and write to it.- 新着としてマーク
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Yes, DATA_IN is a bi-directional signal but you don't get a "Signal has no source" warning about DATA_IN.
The warnings about DATA_IN simply say that the signal is never tri-stated so it's tri-state buffer is always enabled.