Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20803 Discussions

SignalTap II Configuration issues

Altera_Forum
Honored Contributor II
1,149 Views

We're having a really hard time getting SignalTap to work properly. We often get an "Invalid JTAG configuration" message and a "Compile the design before continuing" error for no apparent reason, when the design is completely up to date and has just been compiled. Even when it says "Invalid JTAG configuration", SignalTap will program the device just fine. In both cases, it will not allow us to observe the logic in the STP file. 

 

There's very little information about what these two messages really mean. What could be causing these problems? 

 

Thanks, 

Danny
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
325 Views

For what it's worth, I've had similar problems that get cleared up by doing things like unplug/replug the USB Blaster, power cycling the hardware, killing/restarting jtagd, etc. etc. etc.  

In other words, not strictly related to SignalTap, just that SignalTap problems as you describe are the symptom (for me, anyway) of a general "JTAG is flaky".
0 Kudos
Altera_Forum
Honored Contributor II
325 Views

In some cases, I also observe similar issue with SignalTap especially when after a number of rounds of design edit and compilations. What I did is I remove the existing stp instance and then recreate a new one. You could also try the same to see if it works.

0 Kudos
Reply