SoC with DDR3: Fitter refuses to fit HPS_DM_0

Altera_Forum · ‎08-08-2016

I am trying to compile a 5CSEBA2U23I7S with DDR3 using Quartus 14.1 (and 15.1, same problem); all pins are according to the pin-out document for Cyclone V , but the fitter insists in not agreeing with HPS_DM_0:

Error (14566): Could not place 1 periphery component(s) due to conflicts with existing constraints (1 pin(s))

Error (175020): Illegal constraint of pin to the region (68, 36) to (68, 49): no valid locations in region

Info (14596): Information about the failing component(s):

Info (175028): The pin name(s): RAM_DM[0]

Error (16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below:

Info (175015): The I/O pad RAM_DM[0] is constrained to the location PIN_G28 due to: User Location Constraints (PIN_G28)

Info (14709): The constrained I/O pad is contained within this pin

Error (175005): Could not find a location with: OCT_CAL_BLOCK_ID of 1 (1 location affected)

Info (175029): G28

I don't know about the other DDR3 pins, because the compilation stops.

Any clue?? I tried all I could find; I even removed all pin assignments and the fitter could not find a valid pin.

Thanks in advance.

Altera_Forum · ‎08-09-2016

Have you run the pin constraint .tcl for the SDRAM I/O? It will be output to this location: <Qsys system name>\synthesis\submodules\hps_sdram_p0_pin_assignments.tcl If it's successful if you view the Quartus project .qsf file you should see a bunch of new SDRAM constraints added to the end of it.

Are you sure that's the right pin location and that you have the right device selected in Quartus?

Altera_Forum · ‎08-10-2016

Hi,

I had everything as expected and tried a lot of things to no avail. Finally, I decided to start from scratch (I had several other connections) with only the DDR3 connections and it worked!!

Thanks anyway.

Altera_Forum · ‎08-10-2016

You might have conflicting constraints then. If you start incrementally adding parts from the first design to the second one you might be able to figure out if one of the pieces is in conflict. I would also search the .qsf file (with Quartus closed) for "PIN_G28" to make sure you didn't accidentally assign two resources to the same pin.

Altera_Forum · ‎08-11-2016

Eveeything is alright now; the error message was misleading; the problem was another pin incorrectly connected to a "loaned" HPS pin. Removed this and the compilation was fine.