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State Machine Wizard

BigSid
Beginner
227 Views

I'm using the State Machine Wizard (Quartus II v13.1) and need help with the Transitions tab. What do I put under the "Transition (In Verilog or VHDL 'OTHERS')" column for requiring one full clock cycle to occur before proceeding to the next state? Also, what should be written for requiring an input 8 bit signal to change (to any other value) before proceeding to the next state?

 

Does any written tutorial exist from Altera/Intel for using the State Machine Wizard? Third party YouTube videos are better than nothing but detailed instructions would be more helpful.

 

Thanks.

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2 Replies
SyafieqS
Moderator
155 Views

Chris,


Below link got information related to State Machine Wizard, not sure if this what you looking for, might need to take a look


https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/verify/rtl/rtl_...


SyafieqS
Moderator
126 Views

Chris,


May I know if there is any update?


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