I am using Altera's configurable output delay buffers and configured the differential mode. After that, ports_b were generated:
ENTITY iobuf_iobuf_out_phb1 IS
PORT
(
datain : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
dataout : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
dataout_b : OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
io_config_clk : IN STD_LOGIC := '0';
io_config_clkena : IN STD_LOGIC_VECTOR (0 DOWNTO 0) := (OTHERS => '0');
io_config_datain : IN STD_LOGIC := '0';
io_config_update : IN STD_LOGIC := '0';
oe : IN STD_LOGIC_VECTOR (0 DOWNTO 0) := (OTHERS => '1');
oe_b : IN STD_LOGIC_VECTOR (0 DOWNTO 0) := (OTHERS => '1')
);
END iobuf_iobuf_out_phb1;
So far so good.
Now, I am a bit confused how to assign them to the entity. Because when using differential pins, the n-Versions are typically generated automatically after switching the standard to LVDS in the assignment editor.
I get something like that:
OUTPUT(0)
OUTPUT(1)
...
OUTPUT(16)
OUTPUT(0)(n)
OUTPUT(1)(n)
...
OUTPUT(16)(n)
Of course I can place them in the pin planner - but how do I have to link these pins to the buffer in the port map?
