Stratix III Remote upgrade problems.

Altera_Forum · ‎04-06-2011

I'm having problems getting my system to select an image using remote upgrade, Stratix III on a custom board with an EPCS128 (actually M25P128).

A summary ....

I've checked and Msel is set up for faset active serial config (required).

I've got two images, conf0 and conf1, which light leds to indicate which

image is loaded.

Conf0 is the 'safe' image, this should load conf1 after a 1 second delay.

Using EPCS128 = 16MB device so I've divided it into 4* 4MB image sections.

The compressed rbfs are only ~2MB so this should be plenty.

I've created a *.jic with conf0 at 0x00000 and conf1 at 0x0400000, both

sofs are set to be compressed so shouldn't over-run the 4MB boundary.

Both images load ok when set up as the image at address 0x00000 in the

config prom. The way the *.jic programs the prom in Quartus programmer

suggests that there are two discrete areas that are being programmed

(with no overlap).

Things aren't working so I've modified conf0 to look at the register which

records the configuration trigger (ie why a re-config was triggered when

conf1 is loaded). This is giving me 'runconfig_source: configuration reset

triggered from the logic array, but there's nothing in conf1 that can

trigger it (it doesn't even include the remote upgrade block yet).

The steps in the state machine that drive the re-configuration are....

aru_param <= "100"; -- Boot Address

aru_data_in <= x"400000"; -- 0x40000 / 4

aru_write_param <= '1';

aru_param <= "011"; -- Watchdog Enable register

aru_data_in <= x"010000"; -- only bit 0 is used (WD disable).

aru_write_param <= '1';

aru_param <= "101"; -- Write Configuration Mode (Anf) (?)

aru_data_in <= x"010001"; -- only bit 0 is used

aru_write_param <= '1';

(I'm not sure what this does but it's in the data sheet)

aru_Reconfig <= '1';

I'm setting the boot address to be the same as the EPCS address of the

second image, but as far as I can see this is correct (there's an

obscure reference in the data sheet to 'the other 17 bits are set to

zero').

Does anyone have any idea where I'm going wrong?

Thanks for any pointers,

Nial

Altera_Forum · ‎04-02-2014

Hi,

I am facing similar issue for Arria V device. Can you please let us know how you solved this issue (ie why a re-config was triggered when conf1 is loaded)?

Thanks in advance....

Regards,

Raghav