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Hello everyone,
Just received a new stratix iv dev kit. http://www.altera.co.uk/products/devkits/altera/kit-siv-gx.html Tried to get it up and running with the Ethernet design example. http://www.altera.co.uk/support/examples/nios2/exm-net-std-de.html http://www.altera.co.uk/support/examples/nios2/exm-ethernet-acceleration.html http://www.altera.co.uk/support/examples/nios2/exm-tse-sgdma.html This is just ref design if I'm not mistaken. I have installed the exact same quartus versions even. But I can't get any design working. If I try to compile the project in quartus, and then try to load NIOS code. The code doesnt load. Verification fails with an error like this. http://www.altera.co.uk/support/kdb/solutions/rd04012011_290.html http://www.alteraforum.com/forum/showthread.php?t=23559 And yes, I have tried changing JTAG cables.. The verification failure happens for almost all projects except if i compile using Quartus 12.0 only. On another note: When I load the sof file provided in the example designs, I can get the NIOS code to load ok. But the simple socket server rgmii does not run properly. I can't ping the board (i set a static ip and disabled dhcp). I can't connect to the board via telnet. The 1000Mbps light on the board is consistently on. And the Ethernet RX light blinks if I try to ping the board. However, the Ethernet Tx light doesn't blink ever. I'm frustrated and lost at the moment. Has anybody faced this? Any pointers on which point and where to start debugging? Thanks ZubairLKLink Copied
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Partly solved the problem.
"simple socket server rgmii" All my nios tests were with the template application for simple socket server RGMII, they should have been with just the simple socket server template.. I have gotten telnet working on 12.0 and 13.1. The ones that would at least load the nios code. For the quartus version 12.1 ones, where the code upload verification would fail. The error persists. ZubairLK
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