Stratix IV FPGA not coming alive

[Altera_Forum]

Hello, 

 I am having an issue with my Stratix IV device. It's an EP4SE360F35C3 set to run in active serial mode. I also have a JTAG interface connected. When I apply power to the device, the FPGA does not attempt to configure itself via AS. Also, when I try to access the device via JTAG, I get an "ERROR: Can't access JTAG chain".    I monitored the nStatus pin and it is being held low all the time. Also, nConfig is always high and never initiates FPGA configuration.   All my power levels seem to be coming up correctly but I am just wondering what would cause the FPGA to be stuck like this?

[Altera_Forum]

A little more information for those interested. 

 I did a high level test and monitored each of the JTAG pins. When attempting to access the device, TCK, TDI, and TMS all show movement. I'm assuming it's an attempt to retrieve the device ID. However, when I monitor TDO, there is no signal coming back. It is just stuck low. This is obviously bad.   I did a little more digging into how exactly the active serial configuration is supposed to work. It looks like one of the first steps is for the power to all come up within 100 msec (I have PORSEL set to GND). This happens correctly.   Next, nCONFIG goes from low to high. At this point, nSTATUS is currently at GND. However, after nCONFIG goes high, nSTATUS is supposed to be released by the FPGA and pulled high by an external resistor. My problem is nSTATUS is NEVER released! Since nSTATUS is never released, configuration cannot begin.   Does anyone know what causes nSTATUS to be held low by the FPGA? Thanks for taking the time to read/think about this.

[Altera_Forum]

Hi, 

 we are experiencing exactly the same behaviour. Have you found a solution/the cause of the error? In our case, we suspect some possibly badly soldered pins of the FPGA to be part of the problem.

[Altera_Forum]

--- Quote Start ---  Hi,   we are experiencing exactly the same behaviour. Have you found a solution/the cause of the error? In our case, we suspect some possibly badly soldered pins of the FPGA to be part of the problem.  --- Quote End ---     Yes I did solve this problem. What happened with me was that the DNU pin on the FPGA was accidentally soldered to GND. This essentially killed the chip and produced the above symptoms. I had the FPGA removed, cleaned up, re-balled, and had the pad for the DNU pin isolated. Once that was done I had the FPGA put back on. After that procedure the FPGA came up normally and all the startup signals behaved as they should.   Not exactly an easy fix, but it did solve my problem. Hope this helps.