StratixIV GX and SFP

[Altera_Forum]

I want use GXB_RX and GXB_TX link to the SFP. The GXB_RX and GXB_TX are LVDS levels. The SFP is LVPECL or CML levels.  

 How to link them?   In the StratixIV GT board of Altera, they just link directly. Is it right?

[Altera_Forum]

--- Quote Start ---  I want use GXB_RX and GXB_TX link to the SFP.   --- Quote End ---    What do you mean by "the SFP"? Do you have an SFP cable, an SFP+ cable, a development kit?  Since you mention Stratix IV GT, I assume you are actually interested in SFP+.    --- Quote Start ---   The GXB_RX and GXB_TX are LVDS levels. The SFP is LVPECL or CML levels.    How to link them?    --- Quote End ---    It depends on what the connection requirements are. If you are using the connector as a standard 10GbE connection, then AC couple the TX->RX paths in either direction, and check either end is terminated correctly.    --- Quote Start ---   In the StratixIV GT board of Altera, they just link directly. Is it right?  --- Quote End ---   Which board? The Stratix IV GT Signal Integrity kit? Look at the schematic, it will show you. Most likely the connection is transceiver to SMA connector without anything in the signal path. You may want to include a DC block between TX->RX paths to block the possibly incompatible common-mode voltages.  That would of course require the signals to have no DC bias. But if you are transmitting 10GbE, the signals are 64/66B encoded, so you should be fine.  Cheers, Dave

[Altera_Forum]

Thanks very much for your reply. 

 I check the StratixIV handbook, the GXB_RX and GXB_TX are PCML signals.   I want to communication with 2.5GHz SFP(small form-factor pluggable )models using GXB_RX and GXB_TX pins. In SFP, the tx and rx are AC coupled LVPECL signals.    My questions are,   1. how to link GXB_RX and GXB_TX pins with SFP? Just connect them directly or using some voltage level change chips? In the schematic of StratixV developboard, they connect directly.   2. What PCML standard should chose, 1.4 V PCML, 1.5 V PCML or 2.5 V PCML?   3. In configing ALTGX ip, the Vcm is 0.82V or 1.1V?   Thanks.

[Altera_Forum]

--- Quote Start ---   I want to communication with 2.5GHz SFP (small form-factor pluggable) models using GXB_RX and GXB_TX pins. In SFP, the tx and rx are AC coupled LVPECL signals.     --- Quote End ---    At 2.5Gbps per lane, you do not need to use a Stratix IV GT device, you can use a GX device (your title mentions GX, but your post says GT).    --- Quote Start ---   My questions are,   1. how to link GXB_RX and GXB_TX pins with SFP? Just connect them directly or using some voltage level change chips? In the schematic of StratixV developboard, they connect directly.    --- Quote End ---    Now you say Stratix V! Which device are you really using?    --- Quote Start ---   2. What PCML standard should chose, 1.4 V PCML, 1.5 V PCML or 2.5 V PCML?    --- Quote End ---    Whatever the transciever power supply is on your development kit.    --- Quote Start ---    3. In configing ALTGX ip, the Vcm is 0.82V or 1.1V?    --- Quote End ---   You can configure it for either. However, I don't think either will be compatible with LVPECL, so you would want to AC-couple your SFP signals.  Cheers, Dave

[Altera_Forum]

Thanks for your reply. 

 In my design, the stratix IV GX is used.    The stratix IV GT is used in the Altera development board which I can refer.    The transciever power supply is 1.5V in my design. Based on your advice, the AC couple mide will be used.   Thanks.

[Altera_Forum]

--- Quote Start ---   In my design, the stratix IV GX is used.    The stratix IV GT is used in the Altera development board which I can refer.     --- Quote End ---    Ok, thanks for the clarification.     --- Quote Start ---   The transciever power supply is 1.5V in my design. Based on your advice, the AC couple mide will be used.  --- Quote End ---    What is "my design"? The Stratix IV GX design, or the Stratix IV GT kit?  In my constraints file for the GX kit I have:   # The GXB voltages can be selected by DIP switches on the boards, eg. # # VCCH = 1.4V (default) or 1.5V (reserved) # VCCA = 2.5V or 3.0V (default) # # Quartus Assignments->Device, Operating Settings and Conditions, # Voltage shows the default settings are 1.4V and 2.5V. # Explicitly assign them per the DIP switch defaults. # set_global_assignment -name VCCH_GXBL_USER_VOLTAGE 1.4V set_global_assignment -name VCCH_GXBR_USER_VOLTAGE 1.4V set_global_assignment -name VCCA_L_USER_VOLTAGE 3.0V set_global_assignment -name VCCA_R_USER_VOLTAGE 3.0V   And if I look at the Altera Stratix IV GT SI kit schematic, I see that VCCH = 1.4.  So why do you think it is 1.5V?  Cheers, Dave

[Altera_Forum]

VCCH_GXB[L,R] can be connected to a 1.4 V or 1.5 V linear or low noise switching regulator.  

 Connect these pins to 1.4 V if the transmitter channel data rate is > 6.5 Gbps.  Connect these pins to 1.5 V if the transmitter channel data rate is ≤ 6.5 Gbps.   For data rates ≤ 6.5 Gbps where VCCH_GXB is 1.5 V these pins may be sourced from the same regulator as VCCPT with a proper isolation filter.   For data rates ≤ 6.5 Gbps it is possible to use 1.4 V from a source that is already utilized on the board as long as VCCH_GXB is properly isolated from the other supply.   Decoupling for these pins depends on the design decoupling requirements of the specific board design.