Recently I try to learn how to design high-speed serial communication in FPGA. I don't have experience in this, so I think it is good for me to understand the general approach firstly.
The general approach I mean is: for now I don't consider a specific protocol.
Based on recent investigation, I think the design approach is like this:
1. Determine the protocal and corresponding MGT which we want to use. E.g. we decide to use XAUI.
2. Create an MGT IP core in Quartus, configure it based on specification.
3. Create the protocol IP core (XAUI) in Quartus, configure it based on specification.
4. Then connect the protocol IP with MGT IP, connect protocol IP to other design in FPGA.
Is this approach I described right? If it is not, could you help me understand the approach?
If it is, can I say the most important steps to design high-speed serial communication in FPGA, are configure the MGT IP core and protocol IP core, then connect them?
Thanks very much.
For PCB design, we need to connect the port to relevant FPGA pins (these pins connect to MGT inside FPGA), right ？
Thanks in advance!
