Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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The issue about the FPGA's footprint

Altera_Forum
Honored Contributor II
‎04-20-2011 06:13 AM
1,140 Views

Hi Dears: 

 

I will use Altera's FPGAs, and begin designing board now. I have extracted the FPGA's footprint (FPGA1152) from Altera's devkit. I found this footprint Altera guys used has been fanned out for all balls, as attachment 1 shows.  

 

The fanning out using the vias as attachment 2 shows. The via use the thermal relief symbol as attachement 3 shows, it isn't a normal flash symbol. So I have the question about the thermal relief symbol. 

 

1. Why did the altera guys use the flash symbol like this?(tr0x0x0-0) I think it would be drilled away!!! 

2. How to create the flash symbol like this? 

 

Thanks in advance!
multiple-attachments.zip
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Altera_Forum
Honored Contributor II
‎04-20-2011 06:51 AM
432 Views

Usually, vias don't have any thermal relief. Possibly it's a dummy entry required by the Allegro tool (which I'm not familiar with). I don't see the question related to Altera FPGA at all.

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Altera_Forum
Honored Contributor II
‎04-20-2011 07:54 AM
432 Views

Hi FvM: 

 

Thanks for your reminder!
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