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When I try to program the POF file, Quartus can detect the device but cannot detect the JTAG chain. The 'FPGA configuration successful' LED also turns off. At the same time, when using BTS, it shows as in the image
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Hi xingyunzhidi,
Thanks for test it out.
As the configuration is ok when set to JTAG only, but failed when set to AVST, it is likely that the AVST configuration scheme could have something wrong. A few possible reasons below, you may check one by one.
1- The bitstream in the FLASH is corrupted. If so, you need to erase the FLASH. (If you can not figure out how to erase the FLASH, Let me know which devkit you are using, then I can check the schematic. ) Did this issue happen after you tried to program a POF file to FLASH? If so, then there could be something wrong with this POF.
2- The AVST master is not working properly. Normally there's another FPGA/CPLD works as the AVST master to program the target FPGA. You can check if the board has any LED to indicate this master CPLD is working. Or have you changed the image of this master FPGA/CPLD somehow?
3- The FPGA AVST interface has something wrong.
Best Regards,
Xiaoyan
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Hi,
What is the development kit you are using? What is the FPGA device?
Please check the development kit handbook and find the Switch for Configuration Mode MSEL selection (different board has different SW for the FPGA configuration scheme selection).
Power off the board and change it to JTAG only mode, then power on the board, click the "auto detect" in Programmer to see if you are able to detect the JTAG chain.
If you are able to detect the JTAG this way, then try program a sof file (normally you can find the bts_config.sof file in the BTS package).
Best Regards,
Xiaoyan
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Hello,
I checked the SW section in the FPGA manual. When I set the SW as per the default configuration, I encounter the previously mentioned error ("unable to scan the JTAG chain") and BTS is unable to detect it. However, when I set SW2.1 to OFF (i.e., JTAG instead of AVST×8), it is recognized correctly, and BTS can detect it and program the FPGA with the .sof file. The FPGA manual mentions two configuration modes, but when generating the .pof, it seems like only the AVST mode can be selected. How can I generate a .pof for the JTAG programming mode (with SW2.1 set to OFF)?
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Hi xingyunzhidi,
Thanks for test it out.
As the configuration is ok when set to JTAG only, but failed when set to AVST, it is likely that the AVST configuration scheme could have something wrong. A few possible reasons below, you may check one by one.
1- The bitstream in the FLASH is corrupted. If so, you need to erase the FLASH. (If you can not figure out how to erase the FLASH, Let me know which devkit you are using, then I can check the schematic. ) Did this issue happen after you tried to program a POF file to FLASH? If so, then there could be something wrong with this POF.
2- The AVST master is not working properly. Normally there's another FPGA/CPLD works as the AVST master to program the target FPGA. You can check if the board has any LED to indicate this master CPLD is working. Or have you changed the image of this master FPGA/CPLD somehow?
3- The FPGA AVST interface has something wrong.
Best Regards,
Xiaoyan
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Hello,
This issue indeed occurred after I tried to program the POF file to the FLASH. The FPGA's Ordering Code is D, which is DK-DEV-AGI027-RA. How can I erase the FLASH?
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The issue was resolved after I erased the flash. Thank you very much!

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